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Spl Jobs In China - 7 Job Positions Available

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Standard Chartered jobs

Job Summary Role Purpose • To provide a one-stop User Acceptance Test (UAT) solution with deep understanding of local business and test automation expertise. • Represent business on UAT and focus on end-to-end testing • Leverage

Standard Chartered  20 hours ago
FTI Consulting jobs

Who We Are FTI Consulting is the leading global expert firm for organizations facing crisis and transformation. We work with many of the world’s top multinational corporations, law firms, banks and private equity firms on their

FTI Consulting  15 days ago
Bosch Group jobs

Company Description Do you want beneficial technologies being shaped by your ideas? Whether in the areas of mobility solutions, consumer goods, industrial technology or energy and building technology - with us, you will have the chance

Bosch Group  6 days ago
Delart jobs

About the job Delart is home to a team of world-class engineers and project leaders dedicated to developing the next generation of advanced networking technologies, consumer devices, and innovative technology solutions. Trusted by some of the

Delart  4 days ago
Shure jobs

Overview Shure Incorporated is seeking a hands-on system verification engineer to own the quality, reliability, and performance of our Content Creation microphone series. This role drives end-to-end system testing across hardware, firmware, DSP, acoustics, and companion

Shure  2 days ago
NIO jobs

高级SoC设计工程师 上海、合肥 社招 全职 数字技术 - 芯片研发 本科及以上 3-5 年 职位描述 核心模块设计:负责子系统的架构定义、微架构设计及RTL集成工作,确保低功耗场景下的时钟、复位、唤醒及电源管理逻辑的正确性。需求分析与拆解:参与芯片级规格定义,负责分析产品需求,分解SoC设计规格点,输出详细的设计方案和微架构文档。高质量RTL交付:负责核心模块的Verilog RTL代码编写与交付,确保代码满足时序、功耗和面积(PPA)目标。关键流程把控:负责完成代码的Lint、CDC、RDC、Pre-syn 以及DFT DRC检查,从流程端保证设计质量。并配合Power工程师完成子系统功耗分析和功耗目标对齐。启动与调试支持:精通SoC通用启动(Boot)流程,协助验证团队完成子系统的功能验证,并支持底层固件(BootROM/SPL)的软硬件联调与硅后Bring-up。 职位要求 1. 基本要求微电子、电子工程、计算机科学等相关专业,本科及以上学历,3年以上数字IC设计经验。有成功流片经验更佳。2. 专业技能(掌握一项或多项即可)总线协议:精通AMBA总线协议(AXI/AHB/APB),熟悉基于总线的互联架构和地址映射。处理器架构:熟悉ARM Cortex-R/A系列处理器内核架构,了解其调试接口(JTAG/SWD)及复位/时钟管理机制。外设接口:熟悉常用低速外设协议,如IIC、UART、SPI/OSPI、TDM等,具备对应外设控制器设计或集成经验。启动流程:深刻理解SoC通用Boot流程(如从ROM启动、加载FSBL、PLL/时钟初始化配置、安全启动校验等),熟悉BootROM代码流程或Firmware加载机制。EDA工具与流程:精通SpyGlass或VC Lint等静态检查工具,能独立解决CDC/RDC违例。熟悉综合流程及DFT DRC检查规则,能配合后端团队进行时序收敛。3. 加分项(优先考虑)有低功耗设计(UPF/CPF) 经验。有车规芯片开发经验 投递...

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NIO  2 days ago
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