At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Description Be part of the Cadence DDR PHY IP Front End Design team responsible for
Responsibilities: Develop and optimize Embedded ML inference engines for microcontrollers. Train and fine-tune machine learning models using TensorFlow and PyTorch to be deployed on resource-constrained devices. Implement and experiment with techniques to improve model performance on low-power