Company: Qualcomm China Job Area:Engineering Group, Engineering Group Hardware Applications Engineering General Summary: Job Overview We are looking for a senior ASIC Customer Support Project Manager with rich IC project experience to take full ownership of global customer technical support
Company: Qualcomm China Job Area:Engineering Group, Engineering Group Hardware Applications Engineering General Summary: Job Overview We are looking for a senior ASIC NPI (New Product Introduction) Support Engineer with rich end-to-end chip delivery experience. This role will be responsible for
Company: Qualcomm China Job Area:Engineering Group, Engineering Group Hardware Applications Engineering General Summary: Job Overview We are seeking an experienced Senior ASIC Solution Architect to lead customer technical engagements and drive solution definition for next-generation Data Center ASIC projects. This role
We are now looking for Fullchip Verification Enginneer for the Networking Switch Chip Design Group. As a Engineer at NVIDIAs Networking Chip Design Group, youll join a group of passionate engineers to deliver the next generation
We are now looking for an ASIC Top Floorplan Design Engineer. NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the world’s leading SoCs and GPUs. This position offers you a unique opportunity to craft
As chip sizes continue to grow, power efficiency has become critical across all NVIDIA products - from data centers to automotive and personal computing. Our PMU IP, developed over the past 17 years, is essential in
We are now looking for Chip Design Engineer for the Switch Silicon group. As a Chip Design Engineer at NVIDIAs Networking business unit, youll join a group of passionate engineers to design and implement the next
The NVIDIA GPU clocks group is looking for an excellent ASIC Verification engineer to join the team. The Team is responsible for crafting all aspects of GPU clocking. The team collaborates with the frontend design team to
As chip sizes continue to grow, power efficiency has become critical across all NVIDIA products - from data centers to automotive and personal computing. Our PMU IP, developed over the past 17 years, is crucial in
ASIC-PD team is hiring both junior and senior engineers, whose work scope is physical design from RTL to GSDII: design quality check, synthesis, formal check, partitioning, constraint (for both design and process), async check, timing analysis/fixing/signoff, also
Company: Qualcomm China Job Area:Interns Group, Interns Group Interim Engineering Intern - SW General Summary: 1. ASIC IP/SoC design and verification 2. Participate in whole ASIC flow, including development of micro architecture specification, RTL implementation, design verification, synthesis, timing
SummaryThe people here at Apple dont just build products - they build the kind of wonder thats revolutionized entire industries. Its the diversity of those people and their ideas that encourages the innovation that runs through
NVIDIA NVLink Fusion delivers industry-leading AI scale-up and scale-out performance with NVIDIA technology plus semi-custom ASICs or CPUs . NVIDIA is seeking a Senior Custom SOC/IP Verification Engineer to verify the next generation NVLink Fusion semi-custom silicon.
NVIDIAs Silicon Co-design Group (SCG) sits at a rare intersection: we own the full product development lifecycle, from early architecture definition through silicon bringup to product release. Our ArchDev team is the hub for silicon and
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. The Systems Support Engineer should have the ability to excel in a high-energy, small focused team
NVIDIAs Silicon Co-Design Group is seeking a Senior Infrastructure Automation Engineer to innovate, develop, and integrate innovative AI solutions into the design and automation infrastructure that powers our chips. Every CPU, GPU, and Tegra SoC NVIDIA
NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls
Job Description Develop wafer level cost effective test solution for BST ASIC mass production, including test program and test hardware Support test plan definition for IC production and characterization test and discuss with designer about test feasibility;
Location: Shanghai, China (Zhangjiang Hi-Tech Park, Pudong)Company Overview: Integense Micro is disrupting the semiconductor supply chain with innovative ASIC solutions. As an established provider of integrated circuit solutions for the industrial, solar, and energy storage markets, Integense