The NVIDIA SOC group is looking for ASIC Design and Verification Interns to join the SysASIC and Clock teams. In this position, you will participate in the design and verification of complex reset/fuse/ism/sysctrl/boot and clock-related logic
NVIDIAs GPUs and SOCs are the world leaders in performance and efficiency, and we are continually innovating in creative and unique ways to improve our ability to deliver extraordinary solutions in a wide range of sectors.
2027届校招-模拟设计工程师 北京、上海、杭州 校招 正式 研发 - 电子 / 半导体 职位 ID：A191792 职位描述 1、负责芯片模拟模块规格、设计方案和验证计划的评估与制定；2、负责芯片模拟模块设计和仿真；3、协助layout人员完成版图设计；4、参与芯片相关模块的回片测试并Debug；5、参与专题的技术攻关及技术培训。 职位要求 1、 2027届获得博士学位，微电子、通信或电子相关专业；2、了解模拟电路设计流程，有模电、数电、电路、信号与系统等专业知识积累，对半导体器件以及工艺流程有一定的了解；3、熟练使用Cadence、Synopsys和Mentor等EDA软件进行设计和仿真验证；4、具备开拓创新精神，勇于迎接挑战，有较强的学习能力和良好的团队合作精神。加分项：1、掌握Opamp，Bandgap，Reference等基础模拟电路设计，掌握以下模拟模块/系统（不少于1种）模拟电路设计：LDO，Buck/Boost DCDC、SAR/Delta-Sigma ADC、DAC、OSC、I/F-PLL、MIPI（含PHY）、USB（含PHY）设计；有Video，Audio等系统设计经验优先考虑；2、了解CMOS、FD-SOI、Finfet等工艺流程及器件结构，有40/28/22/14/12nm等设计经验；3、掌握Matlab/Veriloga对模拟系统建模方法；4、熟练运用Spectre,Hspice等电路级仿真工具、Hsim，XA等数模混合仿真工具；5、熟悉基本skill/awk/perl/python等脚本语言。 投递...
NVIDIAs GPUs and SOCs are the world leaders in performance and efficiency, and we are continually innovating in creative and unique ways to improve our ability to deliver extraordinary solutions in a wide range of sectors.
Responsibilities: 1) Design, implement and verify analog/mixed-signal IP 2) Provide technical guidance to layout, application, and validation engineers 3) Create thorough review documentation and follow established design flow 4) Interface with digital & SOC team to
Support the verification of AMS IPs and SoCs by building testbenches, running simulations, and debugging issues across analog and digital domains. Work with cross-functional teams to improve verification quality and automation. Your role Key responsibilities in