As chip sizes continue to grow, power efficiency has become critical across all NVIDIA products - from data centers to automotive and personal computing. Our PMU IP, developed over the past 17 years, is crucial in
We are now looking for Fullchip Verification Enginneer for the Networking Switch Chip Design Group. As a Engineer at NVIDIAs Networking Chip Design Group, youll join a group of passionate engineers to deliver the next generation state of the
The NVIDIA GPU clocks group is looking for an excellent Senior ASIC Design Engineer to join the team. The Team is responsible for crafting all aspects of GPU clocking. We collaborate with the frontend design team to understand
The NVIDIA GPU clocks group is looking for excellent Senior Formal Verification engineers to join the team. The Team is responsible for crafting all aspects of GPU clocking. The team collaborates with the frontend design team to understand
NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls
Company: Qualcomm China Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: Requirements: Familiar with ASIC development, especially logic design, RTL coding, verification, synthesis, timing closure and physical design flow Familiarity with Ethernet switching concepts, such as: L2/L3 forwarding,
Locations: Shanghai, China Categories: Engineering Req ID: 87910 WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming
With us You do WORK THAT MATTERS We are the most trusted partner imaging the unknown by creating foresight capabilities quicker to discover and prevent threats. Our solutions contribute to the improvement of people’s health and
General Information Job Title ZeBu Application Engineer Job ID 18605 Country China City Shanghai Date Posted 02-Sep-2026 Job Category Engineering Job Subcategory Applications Engineering Hire Type Employee Remote Eligible No Descriptions & Requirements Job Description and Requirements
Not only pursuing the outstanding chip performance, NVIDIA also keeps chasing for the power efficiency in every product. Perf-per-Watt is crucial to us. Power Analysis and Optimization Team is responsible for helping IP teams to define
NVIDIAs Silicon Co-Design Group is seeking a Senior Infrastructure Automation Engineer to innovate, develop, and integrate innovative AI solutions into the design and automation infrastructure that powers our chips. Every CPU, GPU, and Tegra SoC NVIDIA has
By submitting your resume, you’re expressing interest in one of our 2027 Hardware ASIC Engineer New College Grad roles. We’ll review resumes on an ongoing basis, and a recruiter may reach out if your experience fits one of
We are now looking for Chip Design Internships for the Switch Silicon group. As a Chip Design Intern at NVIDIAs Networking business unit, youll join a group of passionate engineers to implement the next generation state of
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential
Locations: Shanghai, China Categories: Engineering Req ID: 92127 ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to
ZeBu Application Engineer Location: SH Synopsys is uniquely positioned to offer the most complete verification solution in market today. ZeBu is the emulation platform of Synopsys verification flow, it’s the industry’s performance & capacity in Emulation. As a Senior
You Are: You are a seasoned professional with a strong background in Electrical or Electronics Engineering, holding a BE/ME, Btech/Mtech degree. With over 5 years of hands-on experience in ASIC DFT design, you bring a wealth of
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Title: Lead Design Engineer Location: Nanjing, China Cadence is a pivotal leader in electronic design, building
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Description Job Title: Design Design Engineer II Location: Nanjing, China Cadence is a pivotal leader in
Responsibilities: Implement and verify Scan, MBIST, and Boundary Scan solutions for complex SoC designs. Perform scan insertion, DFT DRC checking, and scan chain validation to ensure testability and design quality. Analyze fault coverage and develop ATPG