Work ScheduleStandard (Mon-Fri) Environmental ConditionsOffice Job Description Thermo Fisher Scientific Inc. is the world leader in serving science, with annual revenue exceeding $40 billion. Our Mission is to enable our customers to make the world healthier,
At ABB, we help industries run leaner and cleaner—and every person here makes that happen. You’ll be empowered to lead, supported to grow, and proud of the impact we create together. Join us and help run
岗位描述 Job Description 工作范围 Scope The Senior electrical engineer will work cross-functionally in supporting Value Analysis/Value Engineering (VAVE) programs including instrument system cost reduction, product design changes due to End of Life (EOL) and quality-based product
FPGA工程师 电子科学与技术 信息与通信工程 理工类专业 北京、成都 正式 职位描述 【数通产品方向】岗位职责1. 参与空间飞行器数通网络系统中 FPGA 逻辑的需求分析与方案设计,根据系统要求确定 FPGA 逻辑架构和模块划分。2. 负责空间飞行器数通产品相关 FPGA 逻辑的代码编写、仿真验证和综合实现。3. 实现空间飞行器数通网络相关功能,如激光通信数据的接收与发送、路由数据处理、接口协议(如 PCIe、Ethernet)的 FPGA 逻辑设计。4. 与硬件工程师、软件工程师协同进行 FPGA 逻辑与硬件电路、软件的联调测试,解决逻辑设计中的问题,优化 FPGA 逻辑性能。5. 编写 FPGA 逻辑设计文档、仿真报告、测试报告等,参与 FPGA 设计评审,确保设计满足星载系统要求。【无线产品方向】岗位职责1. 参与空间飞行器通信基带系统 FPGA 逻辑的需求分析与架构设计,制定 FPGA 逻辑设计方案,确保满足基带信号处理的实时性和性能要求。2. 负责空间飞行器通信基带信号处理相关
General Information Job Title ZeBu Application Engineer Job ID 18605 Country China City Shanghai Date Posted 02-Sep-2026 Job Category Engineering Job Subcategory Applications Engineering Hire Type Employee Remote Eligible No Descriptions & Requirements Job Description and
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Position Description: Responsible for development and maintenance of the synthesizer for Palladium. Implementation for new VHDL/Verilog feature
Job TitleFPGA Engineer Job Description Senior/Advanced FPGA Engineer Key Responsibilities: FPGA Development: Design, implement, verify, and maintain FPGA solutions for CT Gantry and Couch systems. Develop RTL code using Verilog/VHDL. Perform FPGA timing closure, resource optimization, and
ZeBu Application Engineer Location: SH Synopsys is uniquely positioned to offer the most complete verification solution in market today. ZeBu is the emulation platform of Synopsys verification flow, it’s the industry’s performance & capacity in Emulation.
Job ID 522427 Posted since 14-Sep-2026 Organization Digital Industries Field of work Sales Company Siemens Electronic Design Automation (Shanghai) Co., Ltd. Experience level Mid-level Professional Job type Full-time Work mode Office/Site only Employment type Permanent Location(s)
Responsibilities: Implement and verify Scan, MBIST, and Boundary Scan solutions for complex SoC designs. Perform scan insertion, DFT DRC checking, and scan chain validation to ensure testability and design quality. Analyze fault coverage and develop ATPG
NPU IP 设计专家 上海、北京 全职 互联网 / 电子 / 网游 职位描述 职责:1.参与NPU系统的RTL设计2.根据微架构设计文档,独立完成重要模块比如指令队列,标量核,总线接口模块等模块的设计3.支持验证团队,配合验证完成覆盖率的分析与优化4.根据需求进行性能、功耗、面积迭代优化,对接中后端团队完成后端设计5.支持数字电路从RTL到GDSII的实现:逻辑综合,形式验证,低功耗分析优化,以及时钟分析、时序约束、STAsignoff等工作6.支持综合、Formal,Timingflow的搭建和维护任职资格:计算机、电子工程及相关专业硕士毕业,3年以上芯片架构/前端设计经验熟练掌握Verilog、VHDL等设计语言,熟悉IP设计其中一种:crossbar/noc架构、向量加速器、数值计算、内存管理、数据搬运等熟练使用EDA,如Spyglass、VCS、Verdi、DC、primetime、Formality等相关设计工具熟悉前端设计流程,包括RTL,验证,综合,STA等加分项:熟悉NPU体系结构,熟悉AI算法,如llama,Transformer等有低功耗设计经验,熟悉PowerArtist,PTPX等有中端经验,熟悉SDC设计有AI芯片成功设计经验 职位要求 - 投递...
Job Details: Job Description: As a Senior/MTS Applications Engineer, you serve as a trusted technical advisor to customers, field teams, distribution partners, and internal engineering organizations, driving successful adoption of Altera FPGA solutions from evaluation through
FPGA System Engineer Your role Key responsibilities in your new role Architect and implement FPGA solutions for various platforms. Develop and maintain FPGA build (simulation, synthesis, P&R, timing closure, bitstream generation, regression). Integrate FPGA logic with
新业务部-NPU设计工程师 北京、上海、西安 社招 全职 职位 ID:R0414 职位描述 1. 负责NPU数字电路开发。 2.和算法及系统架构团队合作开发子系统并满足系统设计要求。 3.工作内容包括RTL 设计, FPGA原型验证,支持设计验证和后端设计。 4. 参加样片的功能调试及验证,检验芯片的设计和性能。 职位要求 1. 具有IC或者NPU/GPU/CPU系统设计经验4年以上 2. 掌握DNN/CNN的相关知识及系统应用。 3. 具有很好地使用编程语言(VHDL/Verilog/Systemverilog)进行 RTL代码开发经验。 4. 掌握先进IC开发流程知识,包括电路设计,系统集成,代码验证和后端实现。 5. 熟悉用Verilog/systemVerilog进行RTL代码验证。 6. 熟悉脚本语言,如tcl, perl, python等。 7. 具有良好的EDA工具使用经验。 投递...
FPGA工程师 上海、深圳 全职 职位描述 1.负责FPGA逻辑算法的需求分析,架构设计与代码实现,完成高速数字图像采集与处理、探测器数据采集、图像处理算法开发、高速通信接口实现等开发;2.负责FPGA逻辑开发、仿真验证、时序分析优化等工作;3.配合硬件、软件完成系统调试;4.编写详细的技术文档,支撑产品迭代与技术升级。 职位要求 1.掌握一种或多种硬件描述语言(VHDL、verilog),能够吸收掌握外部技术输出并根据项目进展独立进行改进。2.掌握主流FPGA开发工具,如:Xilinx Vivado,modelsim,了解FPGA开发全流程。3.具备良好的数字电路基础;熟练使用示波器,逻辑分析仪等测试仪器。4.具备良好的沟通协作能力,能与硬件、软件、测试团队高效配合,推动项目落地。5.熟悉数字图像处理、数字信号处理、高速通信等技术优先。 投递...
Company Description WD is building the infrastructure behind the AI-driven data economy. As AI scales, so does data. Every interaction, every model, every system generates data that must be stored, managed, and made accessible over