Company: Qualcomm China Job Area:Interns Group, Interns Group Interim Engineering Intern - SW General Summary: 1. ASIC IP/SoC design and verification 2. Participate in whole ASIC flow, including development of micro architecture specification, RTL implementation, design verification, synthesis, timing
The NVIDIA GPU clocks group is looking for an excellent ASIC Verification engineer to join the team. The Team is responsible for crafting all aspects of GPU clocking. The team collaborates with the frontend design team to
As chip sizes continue to grow, power efficiency has become critical across all NVIDIA products - from data centers to automotive and personal computing. Our PMU IP, developed over the past 17 years, is crucial in
About Analog Devices Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into
About Analog Devices Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Key Responsibilities Responsible for scheduling, designing, developing, and supporting IP models of system level memory such
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Position Overview: Principal Project Manager - AE This position is responsible for leading a cross-functional, matrix
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Responsibilities: Working in Cadence Flagship Emulation and Prototyping product line; Responsible for designing, developing, modifying and
Monolithic Power Systems, Inc. (MPS) is one of the fastest growing companies in the Semiconductor industry. We are worldwide technical leaders in Integrated Power Semiconductors and Systems Power delivery architectures. At MPS, we cultivate creativity, are
The NVIDIA GPU clocks group is looking for an excellent Senior ASIC Design Engineer to join the team. The Team is responsible for crafting all aspects of GPU clocking. We collaborate with the frontend design team
Company: Qualcomm China Job Area:Engineering Group, Engineering Group Hardware Applications Engineering General Summary: Job Overview We are seeking an experienced Senior ASIC Solution Architect to lead customer technical engagements and drive solution definition for next-generation Data
Responsibilities: End-to-End Project Ownership: Own SoC program execution from project definition through tape-out and post-silicon support. Ensure on-time, high-quality delivery of key milestones and coordinate engineering support during silicon bring-up, validation, and debug. Technical Leadership: Drive
Not only pursuing the outstanding chip performance, NVIDIA also keeps chasing for the power efficiency in every product. Perf-per-Watt is crucial to us. Power Analysis and Optimization Team is responsible for helping IP teams to define
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Key Responsibilities Technical Support & Case Management: Act as the primary interface for technical issues, driving
Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In Create Account) 2. If you already have a Candidate Account, please