About Analog Devices Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into
About Analog Devices Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Key Responsibilities Responsible for scheduling, designing, developing, and supporting IP models of system level memory such
We are looking for a talented chip design or verification engineer to join NVIDIAs Networking team and apply their RTL/DV experience to formal verification - one of the highest-impact disciplines in pre-silicon engineering. This role is a strong
ASIC-PD team is hiring both junior and senior engineers, whose work scope is physical design from RTL to GSDII: design quality check, synthesis, formal check, partitioning, constraint (for both design and process), async check, timing analysis/fixing/signoff, also all related flow.
ASIC-PD team is hiring both junior and senior engineers, whose work scope is physical design from RTL to GSDII: design quality check, synthesis, formal check, partitioning, constraint (for both design and process), async check, timing analysis/fixing/signoff, also all related flow.
We are now looking for a Physical Design Engineer. VLSI Physical Design Team at NVIDIA Shanghai has been built up since 2005. The team has made contribution to various successful products launched by NVIDIA Corporation over 15 years.
Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering
Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Position Description: Responsible for development and maintenance of the synthesizer for Palladium. Implementation for new VHDL/Verilog
SummaryAre you passionate about changing the world? As a member of our multifaceted group, you will have the outstanding and rewarding opportunity to craft upcoming products that will delight and encourage millions of Apple’s customers every
Company: Qualcomm China Job Area:Engineering Group, Engineering Group Hardware Applications Engineering General Summary: Job Overview We are seeking an experienced Senior ASIC Solution Architect to lead customer technical engagements and drive solution definition for next-generation Data
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Responsibility: To provide key technical support in digital IC design implementation To have strong understanding on
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Position Overview: Principal Project Manager - AE This position is responsible for leading a cross-functional, matrix
AI 工程师 - 端侧与边缘计算 (计算架构与硬件实现方向) 上海 全职 互联网 / 电子 / 网游 职位描述 在这个岗位中，你将驱动软硬件的协同开发，负责将复杂的 AI 模型部署到专用的机器人边缘设备上。你的工作将连接深度学习算法与底层硅芯片，从计算机体系结构的全局视角出发，基于 ASIC、FPGA 等底层硬件构建异构计算系统。你的目标不仅是确保机器人在物理世界中能够在严格的功耗、内存和算力限制下智能且自主地运行，更要通过卓越的工程化能力，保障系统在复杂环境中高可靠、长时稳定地运行。核心职责计算架构与系统落地： 面向机器人的复杂 AI 负载（如感知、控制与决策模型），设计低延迟、高能效的异构计算体系结构，并在 ASIC 等端侧平台上完成深度适配、模型调度与高效落地。RTL 开发与 FPGA 加速： 编写、验证并优化 RTL，为端侧推理引擎构建定制化、高性能的 FPGA 硬件加速单元。端侧部署与高可靠工程保障： 负责深度学习模型在目标边缘硬件上的端到端部署与性能调优。建立严格的工程标准与测试流程，处理复杂的系统级容错与异常态，确保边缘计算基座的鲁棒性。AI 原生研发工作流： 在架构探索、RTL 编写、Testbench 生成及底层系统代码开发的全周期中，深度且高频地使用Coding Agent，把Agent当作工程流水线的一部分。紧跟业界最新AI Agent应用范式及最佳实践，持续更新迭代个人Agent使用模式。 职位要求 计算机科学、电子工程、计算体系结构或相关领域的本科及以上学历（硕士/博士优先）。具备扎实的计算体系结构理论基础，深刻理解底层内存层级、带宽管理及计算单元设计。异构硬件实现能力：
We are now looking for a Formal Verification Manager to join our NVIDIA Networking team! As a Formal Verification Manager in NVIDIA’s Networking Business Unit, you will lead a team of highly skilled formal engineers responsible
The NVIDIA GPU Architecture group is looking for world class architects and software developers to join and lead our various architecture efforts. A key part of NVIDIAs strength is to innovate in the graphics and parallel
The NVIDIA GPU Architecture group is looking for world class architects and software developers to join and lead our various architecture efforts. A key part of NVIDIAs strength is to innovate in the graphics and parallel
The NVIDIA GPU clocks group is looking for an excellent ASIC Verification engineer to join the team. The Team is responsible for crafting all aspects of GPU clocking. The team collaborates with the frontend design team to
Not only pursuing the outstanding chip performance, NVIDIA also keeps chasing for the power efficiency in every product. Perf-per-Watt is crucial to us. Power Analysis and Optimization Team is responsible for helping IP teams to define