Verification Engineer 深圳 社招 全职 智能制造 / 工业互联网 / 工业自动化 职位描述 芯片Verification、FPGA仿真，负责数字模块及系统级验证 职位要求 • 本科及以上学历，微电子、计算机等相关专业• 3年以上IC验证经验• 精通SystemVerilog/UVM验证方法学• 熟悉验证环境搭建、测试用例开发、覆盖率分析• 具备FPGA原型验证经验• 熟悉C/C++、Python等脚本语言 投递...
At ABB, we help industries run leaner and cleaner—and every person here makes that happen. You’ll be empowered to lead, supported to grow, and proud of the impact we create together. Join us and help run
We are now looking for Fullchip Verification Enginneer for the Networking Switch Chip Design Group. As a Engineer at NVIDIAs Networking Chip Design Group, youll join a group of passionate engineers to deliver the next generation state of the
NVIDIA MMPLEX team, located in Shanghai, consists of over 300 team members. We are dedicated to delivering cutting-edge IP solutions to various NVIDIA product lines, including datacenter, GeForce, automotive, networking, and more. Our IPs encompass a
NVIDIA NVLink Fusion delivers industry-leading AI scale-up and scale-out performance with NVIDIA technology plus semi-custom ASICs or CPUs . NVIDIA is seeking a Senior Custom SOC/IP Verification Engineer to verify the next generation NVLink Fusion semi-custom silicon. We
As chip sizes continue to grow, power efficiency has become critical across all NVIDIA products - from data centers to automotive and personal computing. Our PMU IP, developed over the past 17 years, is crucial in
NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls
Monolithic Power Systems, Inc. (MPS) is one of the fastest growing companies in the Semiconductor industry. We are worldwide technical leaders in Integrated Power Semiconductors and Systems Power delivery architectures. At MPS, we cultivate creativity, are
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Qualifications Minimal qualification requires BS/MS degree EE or CS with [ 5-7+ years (T4) ] of
Company: Qualcomm China Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: Requirements: Familiar with ASIC development, especially ASIC verification using System Verilog / UVM, SVA and Coverage-driven methodology, Emulation / FPGA validation Familiarity with Ethernet switching
Company: Qualcomm China Job Area:Interns Group, Interns Group Interim Engineering Intern - SW General Summary: 1. ASIC IP/SoC design and verification 2. Participate in whole ASIC flow, including development of micro architecture specification, RTL implementation, design verification, synthesis,
The NVIDIA GPU clocks group is looking for excellent Senior Formal Verification engineers to join the team. The Team is responsible for crafting all aspects of GPU clocking. The team collaborates with the frontend design team to understand
About Us We are a global climate technologies company engineered for sustainability. We create sustainable and efficient residential, commercial and industrial spaces through HVACR technologies. We protect temperature-sensitive goods throughout the cold chain. And we bring
职位概要Job Summary： 负责产品项目的全过程管理和控制工作，包括立项、计划、开发及验证各阶段。 Responsible for the whole process management and control of product projects, including project establishment, planning, development, and verification stages. 工作职责 Responsibilities : 1． 负责产品项目的全过程管理和控制工作，包括立项、计划、开发及验证各阶段。 Responsible for the whole process management and control of product
Description Position Type: Full-Time, Exempt Work Location: NAWS China Lake, CA Pay: $175,000 - $225,000 / year This position is contingent upon contract award, which is in the proposal stages at this time Systems Application &
Monolithic Power Systems, Inc. (MPS) is one of the fastest growing companies in the Semiconductor industry. We are worldwide technical leaders in Integrated Power Semiconductors and Systems Power delivery architectures. At MPS, we cultivate creativity, are
Monolithic Power Systems, Inc. (MPS) is one of the fastest growing companies in the Semiconductor industry. We are worldwide technical leaders in Integrated Power Semiconductors and Systems Power delivery architectures. At MPS, we cultivate creativity, are
1.Process Quality Management Be responsible for in-process quality control and final inspection of generator set assembly. Establish and maintain quality inspection standards, control plans, and inspection procedures. Drive root cause analysis and corrective actions for manufacturing
The AI Engineer will design, implement, and operationalize domain-specific AI agents. You will develop prompt strategies, retrieval/grounding pipelines, and guardrails, and build integrations to repositories, metadata stores, and execution environments with full provenance and traceability. The role
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Joining our Palladium and Protium solution team, work with a group of advanced interface and memory